搜索资源列表
T-REC-H.264-200503-S!!PDF-C
- H.264中文版的翻译，希望对大家有帮助，我从网上找的，发在这里，待阿可以免费下载·-H.264 chinese translation version, wish this can help you in your design and project@
H.264
- 关于h.264视频解码器完全源码（verilog）-With regard to h.264 video decoder full source code (verilog)
H.264Decoder
- H.264解码器，用verilog写成，可以在FPGA上实现baseline的264解码-H.264 decoder, written with verilog, can be achieved in the FPGA on the baseline of 264 decoding
H.264
- H.264-H.264 video coding
H_264_Baseline_Profile
- 一篇介绍H.264基线规范算法实现的论文-Introduced an algorithm H.264 baseline specification of the paper
H264
- h.264(verilog HDL) 这是基于流水线结构的H.264解码器源码-h.264 (verilog HDL) which is based on the pipeline structure of the H.264 decoder source code
H.264
- H.264视频编解码程序，此程序已经过测试能够运行-H.264
video_systems_latest.tar
- This file is for implenet H.264 on FPGAs.
Src
- H.264编码算法的VHDL实现，很强大，很难得。-H.264 coding algorithm of VHDL to achieve, it is powerful, it is difficult to get.
QPel_H.264_Motion_Estimation
- 一个高效分数点(QPel)运动估计架构设计文档-An Efficient Hardware Architecture for QPel Accurate H.264 Motion Estimation
INTRACODES
- H.264 intraprediction
h264buffer
- h.264 program in vhdl
h264cavlc
- it is h.264 cavlc coding
h264components
- it is vhdl program for components used in h.264
h264coretransform
- it is a vhdl program for core transform in h.264
h264dctransform2
- it is a vhdl program for dct2 tranform in h.264
H_264
- H.264中二进制算术编码的硬件实现Binary arithmetic coding in H.264 hardware implementation-Binary arithmetic coding in H.264 hardware implementation
iqit(verilog)
- H.264算法中的反变换反量化部分的设计，能够实时处理720x576图像。-The IQIT part of H.264, which can process 720x576 image.
AnEfficientDouble-FilterHardwareArchitectureforH.2
- 在此提出了一種新穎的硬體結構 實時執行的自適應去塊效應 過濾過程中指定的H.264/AVC視頻編碼 標準。-In this paper,a novel hardware architecture for real-time implementation of the adaptive deblocking filtering process specified by the H.264/AVC video coding standard, is presented.The deb
jpeg_mpeg_264_src
- 最完整的jpeg/mpeg4/h.264 verilog hdl 源码集合-The most complete collection of jpeg/mpeg4/h.264 verilog hdl source